> -----Original Message----- > From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] On Behalf > Of Michael Watterson > Sent: 04 May 2010 11:15 > To: Microcontroller discussion list - Public. > Subject: Re: [PIC] More program memory > > mattschinkel wrote: > > Has anyone tested adding additional program memory with the 18F8XXX > family? > > http://ww1.microchip.com/downloads/en/AppNotes/00869b.pdf > > > > I am looking for a tested and working schematic, not a block diagram as > > shown in the PDF. > > > > If there is no schematic around, what latch device & memory device do > you > > suggest for the diagram "Figure 4" on page 6? > > > > Thanks, > > Matt. > > > It's straightforward, but only allows table read/write, no Register/RAM > operations, so it's a parallel version of what SPI can do essentially. The 18F parts can execute code directly from external memory, something that is not possible with an SPI memory solution. A couple of 74HCT573 latches should be ok but check timing diagrams for the clock speed chosen for the PIC. Mike ======================================================================= This e-mail is intended for the person it is addressed to only. The information contained in it may be confidential and/or protected by law. If you are not the intended recipient of this message, you must not make any use of this information, or copy or show it to any person. Please contact us immediately to tell us that you have received this e-mail, and return the original to us. Any use, forwarding, printing or copying of this message is strictly prohibited. No part of this message can be considered a request for goods or services. ======================================================================= -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist