Hi all. I'm having a problem using the EUSART in receive mode. Basic info is that I'm using a PIC18f4321. It has the EUSART module. Data is coming in at 250 Kbps via an SN75176 line driver (yes, this is for DMX512, a lighting control protocol). The chip is clocked at 16MHz. I'm currently rewriting my stock DMX512 routines to use them on the PIC18 series and in general update them a bit. Transmit is finished and works fine. Receive is being really stubborn though. My current problem seems to be that I'm getting a ton of overrun errors. I think this is throwing off all of my other receive routines resulting in data being received incorrectly in general. I thought the problem might be the length of my ISR, so I've modified it so that it basically consists of: 1. Context save 2. Check UART receive flag 3. Read RCREG 4. Check OERR 4a. If set, clear CREN, nop, then set CREN. Then toggle a pic (so I can get an idea of how often this is happening) 5. Exit ISR My main program loop is empty. So basically the code should just be receiving bytes as fast as possible and discarding them. However I'm still getting about 10 or more overrun errors per DMX packet. I feel like I must be missing something as it just doesn't seem right that I'm overruning that much. Here is a snippet of code where I set up the serial port: ----- ; Setup serial port movlw b'00000100' ; Disable transmitter, high speed mode movwf TXSTA movlw b'10010000' ; Serial port enabled, reception enabled ; movlw b'11010000' ; Serial port enabled, reception enabled, 9 bit RX movwf RCSTA bsf BAUDCON,BRG16 ; select EUART 16-bit Asynchronous mode operation ; bsf BAUDCON, RXDTP ; received data is inverted movlw d'15' ; init baud rate generator for 250k baud (assume Fosc=16MHz) movwf SPBRG clrf SPBRGH ----- There are a couple of lines commented where where I had tried different options in case that was my problem. I am still unsure if I should be using 9 bit receive and/or inverted idle. I believe I've seen valid data when in a watch window when I pause (I'm running in debug). My reasoning is also that if I did have a setup that was totally wrong I'd be getting more framing errors than overruns. For the record, I've also tried setting up the BRG in non high speed mode, but I got the same results. The part of my ISR that deals with the UART receive looks like this: ----- DMXReceive ; Handle DMX Receiving movf RCREG, w ; Read the receive register and discard btfss RCSTA, OERR ; If we have an overrun error, disable the goto NoOERR ; port then re-enable to clear it bcf RCSTA, CREN nop bsf RCSTA, CREN btg pLED3 ; Toggle LED to advise of problem NoOERR clrf DMXLED ; Clear the counter to keep LED lit bsf pLED2 ; LED on goto _END_DMXReceive ----- This is all code I wrote just to try to figure out where the overruns are coming from. The above routine is called just after context save and interrupt flag check, and _END_DMXReceive takes us to context restore and interrupt exit. The DMXLED register and pLED2 are a sort of receive indicator. I must admit I'm pretty stuck on this one. By my calculations I shouldn't have trouble unloading the UART FIFO, and I think I'm unloading it pretty fast. Yet I still overrun. I must be missing something. I checked the part's errata but there isn't any mention of something that might cause this. I used the same chip to write my transmit routine on. Can anyone shed any light on what I've missed? Thanks! Josh -- A common mistake that people make when trying to design something completely foolproof is to underestimate the ingenuity of complete fools. -Douglas Adams -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist