ivp wrote:
> Yes. At the bottom of memory are 2 vectors

Depending on which end of memory you think is "up".  Personally I think
"top" and "bottom" should never be used to refer to memory locations since
they mean different things to different people.  Since the start and
interrupt vectors of this PIC are at 0 and 4 respectively, apparently your
view of memory is large addresses at the top and low addresses at the bottom
with code executing up the page.  I like to think of code as executing down
the page, so my view is completely opposite.  All the illustrations of
memory in the PIC datasheet also use the low addresses up view, so flipping
it around could be confusing, especially to newbies.  It's best to avoid the
ambiguity by not using "top" and "bottom" in reference to memory.  Besides,
you don't know how the PIC will be mounted ;-)

> For example have the ISR right at the bottom of memory, as some people
> prefer. Then you'd have the main code following it, eg
>
> org 0x00
>
> isr code
>
> org 0x100
>
> main code

Huh?  The interrupt service routine has to be at 4, since that's where the
processor goes on a interrupt.  You don't get a choice about that.  The
processor also goes to 0 on a reset.  You don't get a choice about that
either.


********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014.  Gold level PIC consultants since 2000.
-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist