I would like to put a 3.3V LDO into a circuit to power it normally.  The
data sheet for LK112SM33TR is

http://www.st.com/stonline/books/pdf/docs/8059.pdf

I have two questions:

One:
During ICSP the programmer will put 5V into the board.  The battery will be
disconnected so no voltage will be applied to the reg. input.  The input to
the reg. will have a cap on it and there will be a line to ground with more
than 5Kohms of resistance. (All the rest of the components can take the 5V
OK)

I don't see anything in the Max. Ratings section that would cover "back
driving" like this.  Would this typically be acceptable for this
configuration.

Two:
The output cap ESR stability range is given in Fig. 21.  The allowable range
is roughly 0.05 to 2 Ohms for a 2uF output cap.  The caps that I'm going to
use are ceramic SMD 805 (no name, Chinese).  Will the ceramic cap meet the
0.05 Ohms ESR requirement typically?  From what I've been able to see is
that ceramic caps are < 0.015 ESR therefore I would be below the
requirement.  Suggestions?

Thanks,

Gordon Williams

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