> Thanks for the info and the link. Just to double check, that 0x00 that
> appears when the interrupt occurs is caused by the break, not the
> start code, correct? The next valid byte would be the start code?

Yes, the 00 is in the FIFO from the break. The next byte will be the start
code. On finding FE true, I just read RXREG and throw it out.

>
> As for your link, that's good info to know. There was a response
> posted just today actually, I'm curious how this progresses.

I just updated that post
(http://www.microchip.com/forums/tm.aspx?m=485444). A couple other changes
I made recently to that code is to change the code that calls the ISR from
an "if rxif" to "while rxif". Sometimes by the time the ISR has finished
processing a byte, another on is in the FIFO. This loops until the FIFO is
empty, then exits the ISR. Another change is to put the check of FE only
in state 0, when I'm waiting for break. I had previously watched for an FE
no matter what state the ISR was in. If I found an FE, I'd go to state 1
where I wait for the start code. Because of the FE bit going around the
FIFO, this caused some problems.

I think that code is now good to go. They'll do more testing next week. I
have not worked for that company for 3 years now, but still go back to fix
stuff.

Harold




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