On Sat, Mar 27, 2010 at 1:22 PM, Harold Hallikainen wrote: > When the uart receives a break, a 0x00 shows up in RXREG, the FE bit is > set, and RXIF is set (just like receiving any other character). There is > some discussion of this at > http://www.microchip.com/forums/tm.aspx?m=485444 . Hi Harold, Thanks for the info and the link. Just to double check, that 0x00 that appears when the interrupt occurs is caused by the break, not the start code, correct? The next valid byte would be the start code? As for your link, that's good info to know. There was a response posted just today actually, I'm curious how this progresses. I'm writing a new routine for this based on a state machine on the 18f chips. I haven't done reception for a while and I'd like to update my library of code. Thanks! Josh -- A common mistake that people make when trying to design something completely foolproof is to underestimate the ingenuity of complete fools. -Douglas Adams -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist