Vitaliy wrote: > Once we started using the 3V LDO regulators, we ran into the issue of > output cap ESR. Some regulators specify 1.5 ohms or less, others <5 > ohms. Be careful, some also specify a *minimum* ESR, particularly the cheap knockoffs, although some mainstream LDOs do too. This is one reason we use the Microchip MCP1700 a lot. It's relatively cheap, has decently low dropout voltage, comes in SOT23 and SOT89 packages, and is specified to work with a output cap down to 0 ESR. Nowadays you want to use a SMD ceramic capacitor on the output. These have very low ESR, so you'd actually have to add a resistor in series to use them with some LDOs. Note that your 1.5 ohm and 5 ohm figures are much much higher than the ESR of a 1 or 10uF 10V SMD 0805 or 0603 cap. > How critical is the ESR, and what does it affect? ESR is as critical as the datasheet says it is. > Do I understand > correctly that higher ESRs with heavy loads will cause the regulator > to start oscillating? That could happen. The ESR of the output cap, the impedence of the input voltage, and the load current all have effects on stability. Different designs have different tradeoffs, so as always, you have to pay attention to the datasheet for the particular LDO you are using. > So let's say you have two caps with ESR <10 ohms, can you put them in > parallel to get <5 ohms resistance? Yes. > And by the same token, would the > total inductance be lower? Yes, for that part of the inductance that is unique to each cap and its feed lines. Inductance really shouldn't be a issue with good layout. Put the input and output caps right next to the LDO. By the way, I've lately used a neat trick a lot to get a clean supply voltage. The MCP1700 series works very well with the input voltage one silicon diode drop above the output. I use a PNP transistor accross the LDO such that it comes on when the input is the B-E drop above the output. This is used as feedback to a switcher to indicate when the output is above the regulation threshold. You can go further and put a resistor divider on the output of this sense transistor. The output of this divider will be above some threshold when the transistor is on (LDO input > output + 600mV) but also when the input is high enough. This keeps the switcher from being fooled as the supply is coming up and the output is lagging the input by more than the B-E drop. You can see a example of this on page 1 of http://www.embedinc.com/ioext/hcan2.pdf. The output of the R3/R4 divider has to be above the internal 600mV reference of the 10F204 for the switcher output to be considered high. This particular power supply runs from USB power, and produces a nice clean regulated 5V, even though USB power can range from something like 4.3V to 5.5V. The B-E drop of a silicon transistor happens to be almost perfect for this. There is several 100mV room above before the 6V input limit is reached, and room below before the dropout limit is reached. The switcher ripple is easily well below that, so everything hums along nicely at just about the optimal point. With a nominal 600mV drop on the LDO, it only disspates 60mW at 100mA out, which a SOT23 case can handle. Even at the maximum 250mA out, the dissipation is only 150mW. A SOT89 can handle that fine. ******************************************************************** Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products (978) 742-9014. Gold level PIC consultants since 2000. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist