Olin Lathrop wrote:
> Philip Pemberton wrote:
>> I'm probably being really thick here,
> 
> Careful, you may not be allowed to say that anymore for fear you'd get upset
> and say bad things to yourself ;-)

Oh dear, I just insulted myself! Call the Thought Police! Think of the 
children, won't someone *please* think of the children?! :)

> No, the FET should be able to operate over the full 9V battery range, else
> someone chose the wrong FET.  This schematic smells a bit like someone was
> using rules of thumb and didn't stop to think what they were really for and
> when they apply.  You often see gate resistors like R10 in fast switching
> applications when the drain dV/dt is expected to be large and the circuit
> can switch the gate quickly.  In this case the FET is being run in linear
> mode and the opamp is likely not that fast, so that reason doesn't apply.

700kHz bandwidth at unity gain with Vcc=+-15V, according to the TI 
datasheet, or 1MHz according to National Semiconductor.

Interesting that the output driver stage of the '358 has a series 
resistor in the pull-up (NPN) path, but not in the pull-down (PNP) 
path... Hm.

> The FET gate does look like a capacitive load, and many opamps aren't stable
> with those.  Some series resistance can keep the opamp stable in such cases.
> I haven't looked at the LM358 datasheet, but 10 ohms sounds low for that
> purpose.

Oh, here we go (copied from the NSC datasheet, page 8):

> For ac applications, where the load is capacitively coupled to
> the output of the amplifier, a resistor should be used, from
> the output of the amplifier to ground to increase the class A
> bias current and prevent crossover distortion. Where the
> load is directly coupled, as in dc applications, there is no
> crossover distortion.
 >
> Capacitive loads which are applied directly to the output of
> the amplifier reduce the loop stability margin. Values of 50
> pF can be accomodated using the worst-case non-inverting
> unity gain connection. Large closed loop gains or resistive
> isolation should be used if larger load capacitance must be
> driven by the amplifier.

So it's plausible that R{4,10} are there to stop the amp going into 
oscillation due to the FET's gate capacitance (the FET presents a 
worst-case 4nF capacitive load -- typical rating is about 2nF).

As for the two output-to-inverting-input resistors (R13 and R14), the 
first paragraph would seem to apply, but the output isn't capacitively 
coupled, so maybe not. There are a few application circuits kicking 
around the 'net, but curiously most of them appear to use BJTs. Based on 
the calculations I did, a FET would run cooler in this application at a 
cost of losing the ESD resistance of BJTs... Although I can't say I've 
ever (knowingly) blown a FET up with ESD, usually around here they die 
of catastrophic overvoltage or overheating (fizz, fizz, melt, melt).

-- 
Phil.
piclist@philpem.me.uk
http://www.philpem.me.uk/
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