Dear Spehro,

Your solution seems to be best so far, but, quite frankly, I don't
understand how it works. Do you have any principle description?

Thanks =


Peter



-----Urspr=FCngliche Nachricht-----
Von: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] Im Auftrag von
Spehro Pefhany
Gesendet: Sonntag, 28. Februar 2010 19:01
An: Microcontroller discussion list - Public.
Betreff: Re: [PIC] PIC with PWM outouts generating DIFFERENT frequencies

At 04:35 AM 2/28/2010, you wrote:

Sounds like you just want to generate two frequencies, not actually generate
PWM.

Easiest way, IMHO, would be to use two CCP modules (eg. PIC16F873 etc.) in
the compare mode (set/clear output pin on match (and generate an interrupt
so that you can use registers to count the number of matches). With a 4MHz
crystal and selecting the internal 8:1 prescaler you might just be able to
squeak by without it (524,288usec rollover, unless I made a mistake, so the
0.5 second you need for a 1Hz output can be achieved without extra code (add
0xF424 to the compare register on each interrupt). In general, the number
would be

adder =3D 0.5 * (fclk)/(prescale * fo)

You get to decide what to do if the number is not an integer-- either make
the frequency accurate and add jitter (by accumulating the errors and
rounding each add), or allow a slight deviation in frequency and have
essentially no jitter.

For 400Hz, it works out to 156.25. So if you use 156, you get 400.641 Hz.
If you use (in sequence) 156, 156, 156, 157,... the frequency is exact, but
the duty cycle is off a bit and there will be a periodic jitter. You could
reduce this by reprogramming the prescaler, but since it's shared by the
CCPs this might not be practical. If you count matches with internal
registers you can set the prescaler to 1:1 and get 4/fosc timing resolution,
but it's a bit more coding- you have to ensure that you don't end up with
any of the compare times that are too short.

None of this uses any significant processor bandwidth, assuming a clock in
the MHz. The main limitation on your other stuff is that is shouldn't turn
off or otherwise prevent the CCP interrupt service routine from running
reasonably soon after the match occurs ("reasonably soon", of course, means
that you must always be able to respond to the interrupt and get to the
point of reloading the 16-bit compare registers and update CCP mode before
the *next* match is due to occur!).

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