Philippe Paternotte ha scritto:
> Thanks Dario,
> A quick search gives a silicon errata about "retfie fast" that scrambles
> destination of a movff, movsb or movss because the value saved in fast
> restore registers is the initial value of the destination register, so the
> restored value is not the content of the source register that is lost.
> The question is: is this a general issue for all P18s or an issue specific
> to some processors?

AFAIK it only applies to some (older) 18F PICs
Am not sure if the other possibility - a 2 cycles operation being 
interrupted - applies to all PICs...


> For now I've not found the answer...
> A suggested workaround was:
> (ISR @ 0x0008)
>       CALL Foo, FAST ; store current value of WREG, BSR, STATUS for a second
> time
> Foo:
>       POP ; clears return address of Foo call
> : ; insert high priority ISR code here
> :
>       RETFIE FAST


yep I prefer this one, over the other one of always using "slow register 
saving" also for High Pty IRQ.


-- 

Ciao, Dario
--
Cyberdyne
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