Thanks Dario,
A quick search gives a silicon errata about "retfie fast" that scrambles
destination of a movff, movsb or movss because the value saved in fast
restore registers is the initial value of the destination register, so the
restored value is not the content of the source register that is lost.
The question is: is this a general issue for all P18s or an issue specific
to some processors?
For now I've not found the answer...
A suggested workaround was:
(ISR @ 0x0008)
      CALL Foo, FAST ; store current value of WREG, BSR, STATUS for a second
time
Foo:
      POP ; clears return address of Foo call
: ; insert high priority ISR code here
:
      RETFIE FAST

Dario Greggio (in giro) wrote:
> 
> Philippe Paternotte ha scritto:
>> Seems that I'm the only one to be enough curious about your mystery
>> sentence... 
>> Can you explain further?
> :)
> there's either a Errata about using MOVFF in an ISR (maybe), or rather 
> the chance that since it's a 2 cycle instruction, it may get interrupted 
> in the middle.
> I don't remember the details but I did read them :)
> 


-----
Best regards,

Philippe.

http://www.pmpcomp.fr Pic Micro Pascal for all! 
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