On 2010-02-19 23:47, ivp wrote:
>> The other registers have similar overlapping low byte addresses.
>> So...going into my ISR I might not be in the correct bank
>
> More than likely the only 'bank' you have to worry about is which
> RAM block is being pointed to by BSR. And if you aren't changing
> BSR in the ISR then it's not a concern

When using the access bank you do not have to worry about
banks at all. The ISR-temp regs should be in the access
bank, of course.

>
> BTW, the point of BSR is to speed up RAM access. Simply put, a
> 12-bit address is used for RAM, which can be up to 16 blocks of
> 256. BSR is the most significant 4 bits (a value of 0 to 15), which is
> the start address of a block, and the faster-fetched least significant 8
> bits is the RAM address within that block
>
> I prefer to use 'block' here rather than 'bank' because it's less
> confusing
>
> Note that MOVFW, MOVWF have an 8-bit address and can
> access only the RAM block pointed to by BSR,

*AND* the access bank !!
You can *always* access the access bank, no matter the BSR.

> which you would
> call the current bank. MOVFF uses a 12-bit address, allowing
> you to copy across blocks, including copying an SFR (block 15)
> into RAM and vice versa. Similarly the FSRs
>
>> W_Temp     0x080
>> PORTA       0xF80
>
> It is true that the LSB address is common. However, the instruction
>
> CLRF LATA
>
> is compiled to
>
> CLRF 0xF89,ACCESS
>
> because MPLAB recognises, via the .inc file, LATA
>
> 0xF89 is in Bank15.

Not realy. MPASM sees that the target reg is in the **ACCESS BANK**.
And then add the ",acccess" flag/bit to the instruction. It is not
the fact that the reg happens to be in bank15, the first half of bank0
is usualy in the access bank also (and that's where the ISR temp
regs should be, of course).

> It's an SFR with a fixed address. To access it
> directly you would need to set BSR = 15. W_Temp has a user-
> defined (that's you) address

Right, but there is absolutely no reason at all that it
could not be an address in the access bank. In fact, it *should*
be an address in the access bank in this case.

>
> For example, you might set aside a scratch block/bank of RAM
>
> mc_area  = 0x0200             ;message compilation block
>

Better/cleaner to use the RES directive.


> Now, you can move data in and out of that block to other blocks or
> within the same block using the FSRs or MOVFF, without touching
> BSR, because of the wider addressing range as mentioned above

You can always move data between banks with MOVF and MOVWF
by using one bank pointed to by the BSR and the access bank
as the other. If you need to move data between two banks when
noone of them is the access bank, then yes.

>
> If you're wanting to go through W though, you'd have to change BSR
> to point to first the source and then the target

No, not if one of them is in the access bank.
And INDFx's are probably a better way of doing that anyway.

>
> Perhaps one location (called m_num) in that message text needs to be
> sent to a display routine with its variables in bank 0 RAM, one of which
> is called message_number
>
> MOVLB 2 ;set RAM pointer to 0x200 - 0x2FF
> MOVF m_num,W ;get the contents of m_num into WREG
> MOVLB 0 ;set RAM pointer to 0x000 - 0x0FF
> MOVWF message_number
>
> In reality MOVFF m_num,message_number would be quicker, but I
> think it illustrates the point
>
> In effect BSR works like banksel,

???
Not "works like". BSR is a register and BANKSEL is a MPASM directive.
BANKSEL simply sets the BSR bits.

> so you would use it to work with
> the RAM in a particular block. There is not the ambiguity though of
> SFRs sharing addresses in different banks
>
> eg (18F)
>
>           movlb   .1
>           movlw   0x04
>           movwf   lata
>

No.

    BANKSEL   LATA
    MOVLW     0x04
    MOVWF     LATA

But, since LATA is in the access bank, that isn't needed.
LATA can *always* be accessed no matter the current BSR setting.
That is one of the major things wirth the PIC18, no banking at
all to access the access bank (which usualy includes all FSR's).


> versus (16F)
>
>           bank0
>           movlw   0x01
>           movwf   porta
>
>           bank1
>           movlw   0x01
>           movwf   porta
>
>> I suppose I could use a lot of banksel commands
>
> 'banksel' the pseudo-op isn't applicable on the 18F.

Of course it is. And the MPASM manual says :
"For PIC16 extended and PIC18 devices, a movlb will be
generated..."


> SFRs are in
> contiguous order. If you look at a Data Memory Map, they are
> bunched down at the end of data memory. So there's no instance of
> PORTA in Bank0 at the same position as TRISA in Bank1, but
> 'banks' in the 16F sense don't exist on the 18F anyway as SFRs
> don't co-exist with GPRs in a block like they do on a 16F,

Yes they do !
In the "access bank" (again). Half of the access bank is usualy
RAM and the rest are the FSR's. But not in the "16F sense", no...

> except in
> Bank15,

and in the access bank... :-)

> but even then the addresses are quite distinct. The whole
> memory structure is much more user-friendly and less prone to errors
>

*That* is correct. :-)

I'd seriously advice anyone interesting in the PIC18 to read
up on the architecture themselfs.

> wbr
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