Em 17/2/2010 21:59, Jan-Erik Soderholm escreveu: > Just a minor one here... > > On 2010-02-17 22:20, ivp wrote: > > = >> ... There >> can be also RP2 and RP3, so you might end up in bank2 or bank3. >> = > Now, here I do not follow. RP0/RP1 are enough for *4* banks > (bank0 - bank3). What is RP2 and RP3 ? Or are you talking > about a PIC18 ? > = PIC18 don't have RPx bits at all, They have the (four-bit) BSR register and the MOVLB instruction, which loads BSR with an immediate value. Of course you could manipulate its bit directly if needed, or load it from WREG (using MOVWF instruction) or from any other register (using two-word instruction MOVFF). Regards, Isaac P.S.: Analyzing the PIC18 instruction set, it would be possible for Microchip to create PIC18 devices with more than 4 kbyte of RAM. The MOVLB instruction has four spare bits for the immediate value, the same for the LFSR instruction. This is not the case of the MOVFF instruction, but that's OK, we could live without it. By adding more RAM and extending the BSR and FSRx registers, they could create devices with up to 64kbyte of RAM. __________________________________________________ Fa=E7a liga=E7=F5es para outros computadores com o novo Yahoo! Messenger = http://br.beta.messenger.yahoo.com/ = -- = http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist