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I implemented what Linux calls the CRC-CCITT (I translated from the
Linux source), which is a 16-bit CRC, on a PIC18F4550. My implementation
takes 24 instruction cycles and 24 words of Flash for the basic "add
one byte to accumulated CRC" operation. I suspect a table-driven
implementation could be made somewhat faster, at the cost of 256 words
of Flash space (plus the size of the calculation code, which would be
smaller).

The code is listed below (I haven't tested this precise code, because
it's a search-and-replace from code that uses the extended instruction
set with FSR2 to fill an array of CRCs, but it's a simple
s/\[0\]/crc_low/, s/\[1\]/crc_high/, s/movss/movff/ from there to
here so it shouldn't have introduced any bugs):

  xorwf crc_low, W
  movwf temp
  movff crc_high, crc_low
  movwf crc_high
  rrncf temp, W
  andlw 0x07
  xorwf crc_high, F
  swapf temp, F
  movf temp, W
  andlw 0xF0
  xorwf crc_high, F
  rrncf temp, W
  andlw 0x07
  xorwf crc_high, F
  swapf temp, W
  xorwf temp, W
  andlw 0x0F
  xorwf crc_low, F
  rrncf temp, W
  andlw 0xF8
  xorwf crc_low, F
  btfsc temp, 4
  btg crc_low, 7

You're welcome to use this, though I assume it's probably under GPL
since it's a hand-translation from the Linux source code into PIC
assembly.

Chris

On Wed, 23 Dec 2009 20:52:51 +0100
Dario Greggio <adpm.to@inwind.it> wrote:

[snip]

> 
> Hi Forrest, I use a 8bit one on my (now old) RS485 based home
> automation devices :)
> (time to consider an upgrade indeed, but it works pretty fine in 
> non-noisy environments).
> 
> As you pointed out, different CRC (and CRC seeds) apply to different 
> scenarios, so it's actually usually better than 1:65535 or
> 1:4billions ratio. Depending on the kind of errors that you do
> expect, you may pick a better one for your needs.
> 
> I'd say that nowadays a CCITT-alike CRC16 is well within any PIC 18
> or above capabilities. CRC32, I don't know, and I don't know if it's
> worth indeed...
> 
> 

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