On Nov 19, 2009, at 4:59 AM, Dave Tweed wrote: > I think the problem is that you can use the chip area for either a > 100 Mbit > PHY, or for lots of RAM, but not both. Yeah; I'd be happier if there was a 10Mbit on-chip phy as an option. It could use the same pins at the RMII (actually, fewer pins.) Or for that matter, a R-RMII and a smaller 10Mbit only phy. I mean, I'd just as soon have my $30 8-port switching hub do the conversion from microcontroller data rates (<<10Mbit) to "typical network rates" (100Mbit or higher) rather than put the extra cost and complexity on each microcontroller device. (grumble, grumble. "When I was your age, 10Mbps was considered fast enough to share between 100 computers!") BillW -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist