Alan B. Pearce wrote:
> BUT what it does sound like is that the I2C hardware is waiting for
> the slave device to respond with the 9th bit which is the acknowledge
> bit, and if that doesn't happen, then the second byte won't get
> transmitted.

I don't think it works that way since the master controls the clock.  In
other words, the bit time for the ACK bit is set by the master and the slave
either pulls the line low or not.  The master doesn't wait for the slave to
send the bit, it just samples the line at the appropriate time.

Higher level protocol logic may decide to retry until the slave responds,
but I don't think that is built into the MSSP.  It only tells the firmware
whether the ACK bit was recieved high or low.


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