Isaac Marino Bavaresco wrote:
>>> Vgs(th) (threshold) is the gate voltage below that no current flows
>>> at all.
>>
>> No, it's not.  For one thing, a FET will always allow some current
>> to flow when normal drain voltage is applied, so clearly a spec for
>> zero drain current makes no sense.
>
> OK, not ZERO current, only leakage current.

It's not that either.  This is getting silly.  Try reading one of those
datasheet thingies people here are always on about.

The gate voltage to drain current at a fixed but meaningful drain voltage is
a smooth continuous function.  It does tend to level off at each end,
particularly at the low current end, but there is no single point you can
say that the FET starts to come on.  Without a definition of how exactly
"starts to come on" is interpreted, Vgs(th) is meaningless.

For example, take a look at the datasheet for the IRLML2502.  It specifies
Vgs(th) as 600mV to 1.2V but also clearly states that this is for 250uA
drain current and that the drain and gate were tied together for the purpose
of the test.  For other FETs meant to handle 10s of amps, the current
threshold for Vgs(th) is likely higher.  Note that the IRLML2502 has a max
leakage current of 25uA with 16V drain to source.  So in this case they are
defining Vgs(th) as the gate voltage that allows for 10x the worst case
leakage current.


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