> HOWEVER, on pages 156 and 157, there are two tables that list the minimum and
> maximum ranges for the PLL inputs as 4-10MHz; with a 10MHz clock you would
> either end up with 160MHz (x16 PLL - and exceeding specs), or 80MHz (x8 PLL -
> but only 2/3 of the maximum possible).

The oscillator datasheet for the dsPIC30F family (DS70054E) actually backs
this up, so I guess I need a 7.5MHz crystal.  Shame I didn't go for one of
the dsPICs that have an (HS / 2) * PLL mode, then I could've just used one
of the abundance of 15MHz crystals I have.  C'est la vie.

Cheers,

Pete Restall
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