Speaking of ceramic caps...

A 0.1uF cap has long been the standard for power supply bypass  
capacitors of most ICs.  Occasionally you'd see smaller values  
(0.01uF) in higher frequency designs.

As I understand it, the idea was that smaller value caps had "better"  
characteristics such a lead and internal inductance, ESR, and so on.   
While bigger caps had, well, more capacitance.  0.1uF was the "sweet  
spot" for most apps.

So, that was all about a generation ago.  TTL and ceramic disk caps.   
Nowadays, I wonder if these rules of thumb are obsolete.  It's hard  
for me to imagine that a 0.1uF 0805 SMT ceramic cap has much different  
non-capacitance features from a 10uF 0805 SMT ceramic cap (different  
dielectric, different max voltage, yeah, but those are less relevant  
to bypass, right?)  The situation is similar for leaded multilayer  
ceramic caps (SMT cap with leads, pretty much, eh?)

So is there some new reason for carefully picking bypass cap values  
(modern CPUs and certain chips get very picky, but is that more of  
"we're sure that this works" rather than "this is actually what is  
required"?)  Is more capacitance better, within a certain smt cap  
size, as long as rated voltage stays high enough?  Are the exotic  
dielectrics that permit 100uF ceramic caps (ok, bigger than 0805!)  
subject to odd physics that makes them poor bypass caps?  What ARE the  
new rules, or new concerns, now that lead-length and long spools of  
foil are no longer players?

Thanks
Bill W

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