>> That is, from the very Schmitt Trigger idea it is guaranteed >> that the level below 2.7V won't be considered logic "1". > > No, read the datasheet again. =A0The signal is guaranteed to > be interpreted as high if it exceeds 80% of Vdd. I did read the datasheet before. It says min logical high is 80% of Vdd. I did find no clause that it guarantees any level higher to be interpreted as high; nor find I a clause that levels below 80% of Vdd are guaranteed not to be interpreted as high. I used to think that since the feature the Schmitt Trigger is all about is its hysteresis, and no any other voltages are mentioned, then that MIN/MAX values are about the hysteresis, that is, the signal within the "dead range" won't affect theTrigger state. Perhaps I was wrong, I'll re-check it later. If hysteresis is unspecified or even is absent, - this won't be a problem for SDO or SS lines, but for slowly rising/falling SCK (due to divider's resistors) this may cause "level bouncing" near the point when logical "0" level starts to be interpreted as high. A significant load on 5V LDO at the moment would cause (a divider's voltage/input signal) to "fall back" slightly and the logic "1" would get back to "0" for a moment. Some desing arrangements should be taken to avoid the effect. -- = http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist