Michael Rigby-Jones wrote:
> You seem to have this idea that the faster the edge the
> better, this is far from the truth in the real word. =A0Fast
> edges can cause many problems in circuits, so it's a
> good idea to have edges that are fast enough to provide
> enough timing margin but not significantly faster.

There is no much sense attributing me this or that idea. I would
recommend you a good book "Art of Electronics" to figure out the
timings on your own.

The FET input capacitance is sort of some hundred pF. The PIC output
current is limited to 25ma. This would yield a transition time sort of
some tenths of nanoseconds, aprox 10 to 20 times faster than the
divider's timing. Such a slope corresponding to aprox 10MHz sine at a
fraction of mA current should not cause much trouble.


>=A0If you need faster edges than the purely resistive divider
> can achieve for a given capacitive load, it's a simple
> matter to use a capacitor across the upper resistor to
> provide a compensated divider.

If it were me who had expressed that overgeneralized statement, I'd
possibly had been experienced severe ostracism by some for spreading
out bad practices :-)

-- =

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