> -----Original Message-----
> From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] On
Behalf
> Of Marechiare
> Sent: 05 October 2009 19:58
> To: Microcontroller discussion list - Public.
> Subject: Re: [PIC] PIC SPI level conversion
> 
> For Olin:
> 
> ***
> For the circuit:
> 
> "perfect 0 to 5V square wave followed by the 2K,3.0K ohm divider,
> 
> driving some capacitive load" (the capacitive load being connected
> between the middle of the divider and ground).
> 
> We decrease divider's bottom resistor 3.0K to 2.95K, the top divider's
> resistor 2K remains the same. The impedance as per Olin
> 
> (R1*R2)/(R1+R2) will decrease.
> 
> How will be the time to rise the signal on the capacitor from 0V to
> 80% of 3.0V (that is 2.4V) in the case of 2.95K bottom resistor
> compared to the rise time when the bottom resistor is 3.0K?
> 
> Will it decrease as per Olin's proposition  - the lower impedance -
> the higher speed of signal?
> ***
> 
> 
> 
> For Mark Rages:
> 
> ***
> For the circuit:
> 
> "perfect 0 to 5V square wave followed by the 2K,3.0K ohm divider,
> 
> driving some capacitive load" (the capacitive load being connected
> between the middle of the divider and ground).
> 
> We decrease divider's bottom resistor 3.0K to 2.95K, the top divider's
> resistor 2K remains the same. The impedance as per Olin
> 
> (R1*R2)/(R1+R2) will decrease.
> 
> How will be the time to rise the signal on the capacitor from 0V to
> 2.99V in the case of 2.95K bottom resistor compared to the rise time
> when the bottom resistor is 3.0K??
> 
> Will it decrease as per Olin's proposition  - the lower impedance -
> the higher speed of signal?
> ***

Are you genuinely failing to understand what people are trying to
explain, or are you now trolling?

1) With a 5v signal, and a potential divider of 2k and 3k, the final
voltage will be 5 * 3/(2+3) = 3v.  The source impedance will be 3k||2k =
1.2k.  The 10%-90% voltages will be 0.3v-2.7v.

2) With a 5v signal, and a potential divider of 2k and 2.95k, the final
voltage will be 5 * 2.95/(2+2.95) = 2.98v.  The source impedance will be
2.95k||2k = 1.19k.  The 10%-90% voltages will be 0.298v-2.682v

Assuming both circuits are driving the same capacitive load the rise and
fall times will be slightly lower (faster) in the second case due to the
lower source impedance, but the voltage swing will be slightly lower as
well.  Do you now understand?  If not then I can recommend 'The Art of
Electronics' to gain a basic understanding of these principals.

Regards

Mike

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