Mark Rages wrote: > Anyway, the subject is 5V to 3.3V conversion. Suggesting > conversion to other levels is not very interesting. No, subject is 5V to 3.0V conversion acoording to OP: "Does anybody have a simple level conversion circuit or a favorite chip they use to convert the 5V to 3V and vice versus ?" Mark Rages wrote: > Rise time is always defined relative to "full" voltage, not > some absolute 2.9V. So relative to the new full voltage > of 3.29V, the time will decrease. So you insist that "3.29V to 3.3V" is conceptually different to "2.9V to 3.0V"? Hmm. Well, let it be 2.99V Olin Lathrop wrote: > Marechiare wrote: >> How will change the time to rise the signal on the capacitor >> from 0V to 2.9V ? > > This is the wrong question, which is probably why you are > disagreeing with everyone else. I am not sure I understand the concept "wrong question". Wrong could be an answer, not question, as for me. > The right question is "How will the rise time from 0V to 80% > (or any fixed percentage) of the final value change?". Aha, 3V * 80% = 2.4V not 2.9V. So you insist that "2.4V to 3.0V" is conceptually different to "2.9V to 3.0V"? Hmm. Well, let it be 2.4V. I wrote earlier: > He propopsed an idea that an impedance calculated as (R1*R)/(R1+R2) > would reflect the "speed" of the signal - the lower impedance - the > higher speed. Olin replied: >Yes. So the "right" questions are: For Olin: *** For the circuit: "perfect 0 to 5V square wave followed by the 2K,3.0K ohm divider, driving some capacitive load" (the capacitive load being connected between the middle of the divider and ground). We decrease divider's bottom resistor 3.0K to 2.95K, the top divider's resistor 2K remains the same. The impedance as per Olin (R1*R2)/(R1+R2) will decrease. How will be the time to rise the signal on the capacitor from 0V to 80% of 3.0V (that is 2.4V) in the case of 2.95K bottom resistor compared to the rise time when the bottom resistor is 3.0K? Will it decrease as per Olin's proposition - the lower impedance - the higher speed of signal? *** For Mark Rages: *** For the circuit: "perfect 0 to 5V square wave followed by the 2K,3.0K ohm divider, driving some capacitive load" (the capacitive load being connected between the middle of the divider and ground). We decrease divider's bottom resistor 3.0K to 2.95K, the top divider's resistor 2K remains the same. The impedance as per Olin (R1*R2)/(R1+R2) will decrease. How will be the time to rise the signal on the capacitor from 0V to 2.99V in the case of 2.95K bottom resistor compared to the rise time when the bottom resistor is 3.0K?? Will it decrease as per Olin's proposition - the lower impedance - the higher speed of signal? *** -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist