Marechiare wrote:
>>> On rising edge I don't see how does mentioned in your calcs
>>> 3Kohm divider's bottom resistor help to speed the rising.
>>
>> This is very basic electronics. Look up something called
>> "Thevenin Equivalent".
>
> Interesting, obviously, removing the bottom resistor from the divider
> would increase the speed of rising

No, it wouldn't.  The bottom resistor contributes to lowering the output
impedence of the voltage divider.  Lower output impedence causes faster
output edges.

> But, according to your logic/formula removing the bottom resistor
> would increase impedance and, thus, decrease the speed of rising.

Yes, but it's not just my logic, it's basic electronics.  You apparently
didn't look up "Thevenin Equivalent" like I suggested.  You really need to
do that before commenting on this circuit again.  In fact, anyone fuzzy on
Thevenin and Norton equivalents should refrain from pontificating on
electronics to avoid embarassement and confusing newbies.

> Aha, I see, the problem is that I ommited the magic word "COULD". Ok,
> if I had written " It COULD be much better to synch to sharp falling
> edge" - would the rest hold true about FET + resistor to VERY PROBABLY
> be better than the divider in many designs?

The I disagree about the "very probably".  It sounds like there is still
only One Right Way in your mind.  While a grounded source N FET could be the
right tradeoff in some cases, it also has significant enough issues that
making it sound like it's almost always the right answer is misleading.  As
we've already discussed, there are several ways to go from 5V to 3.3V logic.

A resistor divider is cheap and simple.  Drawbacks are that it has
relatively high (compared to a CMOS logic gate) output impedence or requires
high current, and that it draws current continuously at logic high.

A grounded common emitter/source transistor is faster on output falling
edges.  Drawbacks are that is costs a little more, rising edges are slower
for the same current (at 5V to 3.3V), and that it inverts.

A level shifting gate is probably the best way from a purely electrical
standpoint, but costs even more, requires more connections, and probably
more board space.

The point is there is no One Right Answer.  The right answer for a
particular design depends on the relative weighting of all the advantages
and disadvantages of each method.  For example, in one project I needed to
connect the UART output of a dsPIC running at 5V to the UART input of a 18F
running at 3.3V, the baud rate was 115.2K, and both processors were on the
same board with a common ground.  In that case a resistor divider was the
clear choice since it was cheap, small, plenty fast enough for 8uS/bit, and
the dsPIC wouldn't be released from reset until both supplies were up and
stable.  A inverting solution, like your FET or transistor method, would
have made no sense.  A level shifter chip would have worked, but would have
cost more and taken more board space, especially since I only needed to
convert that one line.


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