Marechiare wrote:
> Kinda dirty trick - "or is your comment silly superstition?"  to
> provoke an unneeded flame. That's not plain talk, that's just a dirty
> trick, as for me :-(

Your original statement just said it was bad without providing any reasoning
or supporting evidence.  That's what superstition is, belief without
reasoning or evidence.

> SPI is a bus and it should be treated as a bus.

Sometimes thinking of it as a bus is a useful abstraction, but in the end
it's still a collection of individual signals.  Either way, I don't see how
this is relevent to converting between 3.3V and 5V ends.

> With the voltage
> divider you can guarantee that the output voltage won't exceed 3.3V,
> but you can't guarantee it never exceed  Vdd on those 3.3V parts.

OK, a real argument.  Yes, for most chips you have to make sure the 5V end
doesn't try to drive the line high before the 3.3V power has come up when
using a resistor divider.  In most cases this is a minor issue because the
supplies come up at nearly the same time, so all that is needed is a little
delay in the 5V end before driving the line high.

In some mixed voltage projects I've done, the power good signal from the
last power supply in the chain is used to release all parts from reset.  In
that case no additional delay is needed since all power is up before any
microcontroller starts running.

> SDO, SCK, and SS from Master to Slave lines are to be driven with one
> transistor each line;

Well that's one way, but shouldn't be proclaimed as How It Is To Be Done
because there are certainly other ways.

> the transistor's drain or collector being
> connected to 3.3V through a resistor and the transistor's source or
> emmiter are on the ground.
>
> Back, the slave's SDO (master's SDI) would drive the line through a
> transistor, the transistor's collector being connected to 5V through a
> resistor, its emmiter is on the ground.
>
> Signals are inverted by the transistors, but you can select SCK
> polarity programmatically. SDO, SDI you could invert programmatically
> too if needed.

That scheme gets around the different power supplies being down at different
times.  It has its own set of issues though, so like most engineering
decisions, it's a tradeoff.  Drawbacks to this approach are that the signals
are inverted as you said, a fair amount of added discrete parts, and the
speed of the rising edges versus current consumption tradeoff is worse than
for a resistor divider.  Nothing is free.  This scheme might be worth it
when the 5V and 3.3V power supplies could go up and down independently.


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