At 12:37 PM 30/09/2009, you wrote:

> >
> >> There is a tradeoff between speed and current consumption with the
> >> resistor
> >> divider, but that is no different than the tradeoff of what family gate
> >> to
> >> use for the other direction. My standard answer is 2K ohms in series
> >> followed by 3.9K ohms to ground for 5.0V to 3.3V, but some cases may
> >> require
> >> lower values. 2Kohms // 3.9Kohms = 1.3Kohms, * 100pF = 130nS, so that
> >> should be good for up to 2MHz square wave considering 100pF is very high
> >> for
> >> on-board traces.
> >>
> >> Do you have any fact-based objection or is your comment just silly
> >> superstition?
> >
> >
> > Where did you get 100pF in your calculations?  Is this just a conservative
> > value you chose for a rough estimate?
> >
> >
> >
> > FJ
>
>That brings up an interesting idea. How about treating the voltage divider
>like a scope probe with a compensating capacitor across the top resistor.
>Like with a scope, adjust the capacitor value until you get a square
>waveform without overshoot. We have a resistive voltage divider in
>parallel with a capacitive voltage divider.
>
>Harold

Sure you could.. especially if you knew the capacitance of the traces and
input(s) with some accuracy (and assuming it was reasonably stable- not much
contributed by the temperature-sensitive FR4, no fly wires etc.), but wouldn't
it be better to use a translator with solid output drive which is designed for
the job in cases where you may need high speed?

There are lots of translators with dual supplies (no sequencing 
required) and many
are bidirectional (with a direction pin). This kind is cheap, fast, and pretty
much foolproof.

For example: http://focus.ti.com/lit/ds/symlink/sn74lvc2t45.pdf

Of course it's nice if you can just run everything off the same 3.3V supply and
avoid translation altogether-- there are RS232 drivers which operate from 3.3V,
so maybe that's an option for the OP.

For high-to-low, resistor dividers are okay if speed is not high and 
cost is your
main concern. There is likely going to be current flowing into the input
protection network if the low voltage supply comes up later (a 
potential latch-up
situation that should be checked, but it's probably okay), and 
worst-case tolerances
could be on the edge of what is officially permissible depending on 
the supply and
resistor tolerances, but usually it should work out well enough for 
non-critical
designs. Open-drain solutions have the speed issue, but not the other concerns
since you'll pull up to the appropriate supply voltage.

BTW, keep in mind that you can't just feed 3.3V CMOS outputs into the 
SDI input
of a 16F88 @5V and expect it to work reliably since they are ST- and 
not TTL-level
inputs so a "high" could be as much as 80% of Vdd (4V nominally), plus you'd
like at least a few hundred mV margin beyond that, so 3.3V nominal doesn't
even come close to cutting it.

As Olin suggested, a 74HCT gate will work, as would a single-bit version of
the 2T45 translator for low-to-high. Or bit-bang the SPI and use a regular
PIC I/O port. Heck, if you are bit-banging and really trust your PIC use a
pullup to 3.3V on the output, set the pin state to low, and diddle the TRIS bit
instead-- but really I'd put a series resistor in there too. ;-)

Best regards,

Spehro Pefhany --"it's the network..."            "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com



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