On Sat, Sep 12, 2009 at 9:47 PM, Olin Lathrop w= rote: > Manu Abraham wrote: >>> Why putting a goto ISR at the ISR entry point and not the code. >>> Do you handle the interrupt correct? >> >> from the datasheet, all that i do find to handle an interrupt: >> >> isr >> clear INT_FLAG >> retfie > > This doesn't have much to do with the question. =A0The point is you have a > GOTO at 4 instead of the interrupt routine. =A0That is a bad idea on a si= ngle > page PIC, and is outright broken on a multi-page PIC. Ok, modified the code to not have the complete ISR inline, but still no cha= nges PROCESSOR 16f72 #include "p16f72.inc" = __CONFIG _CP_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC loopus_a EQU 0x2d loopms_a EQU 0x2e loopms_b EQU 0x2f loopms_c EQU 0x30 flags EQU 0x31 w_tmp EQU 0x32 status_tmp EQU 0x33 pclath_tmp EQU 0x34 fsr_tmp EQU 0x35 LEDPORT equ PORTA LEDBIT equ 1 org 0x0 goto init org 0x4 ; save registers movwf w_tmp ; save w swapf STATUS, w ; swap status clrf STATUS ; bank0 movwf status_tmp ; save status movf PCLATH, w ; save pclath movwf pclath_tmp clrf PCLATH movf FSR, w ; save fsr movwf fsr_tmp ; actual ISR bcf INTCON, INTF bsf flags, LEDBIT ; restore registers movf fsr_tmp, w movwf FSR movf pclath_tmp, w movwf PCLATH swapf status_tmp, w ; set bank to original movwf STATUS ; restore swapf w_tmp, f ; swap tmp swapf w_tmp, w ; swap tmp -> w retfie #include "delays.inc" init clrf flags banksel TRISA movlw 0x06 movwf ADCON1 movlw 0x00 ; Port A output movwf TRISA movlw 0x01 ; RB.0 int movwf TRISB banksel OPTION_REG bcf OPTION_REG, INTEDG ; falling edge int bsf OPTION_REG, NOT_RBPU ; disable pullup bsf INTCON, INTE ; enable RB.0 int bsf INTCON, GIE ; global int banksel LEDPORT main btfsc flags, LEDBIT bsf LEDPORT, LEDBIT ; LED on movlw 0xff call delay_ms bcf LEDPORT, LEDBIT ; LED off movlw 0xff call delay_ms clrf flags ; clear all flags goto main END -- = http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist