At 03:09 PM 8/27/2009, Jinx wrote: >Yes. This method uses a similar principle > >http://home.clear.net.nz/pages/joecolquitt/0pots.html > >8 bits is attainable. I got good results, using an LED array to track >the pot's position Hi there, Jinx. I've been doing something similar for many, many years now, but with one small difference: I specifically test for counter wrap (overflow) and break out of the loop early if that occurs. Your pot measuring loop is: measure btfsc pot ;bump measure while pot pin is low goto store ;else jump out and store count incf count1,f goto measure Mine is almost identical: measure btfss pot ;increment counter while pot pin is high goto store ;else jump out and store count incfsz count1,f goto measure decf count1,F ;counter wrapped to 0x00 - fix it ;fall into store The other difference between your method and mine is cap polarity: I start the measurement with the cap line sitting at Vdd and discharge down to the threshold voltage. That gives much more range - typical pin threshold of a TTL input on a PIC running from a 5Vdc supply is about 1.3V. I use a 100n film capacitor with 220R in series, connected from Vdd to the PIC pin. The pot is 10K, also with a 220R series resistor, connected between the PIC pin and Vss. The reason for connecting the far end of the cap/resistor network to Vdd is for discharging: the discharge current path is from the PIC pin, through Vdd, then the cap/resistor network. This simple change ensures that the PIC supply doesn't sag when discharging the cap. But the main difference is one simple instruction change: the "incf" changes to "incfsz". Thought you might find this useful. dwayne -- Dwayne Reid Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax www.trinity-electronics.com Custom Electronics Design and Manufacturing -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist