Good day to all. I'm working on an old project that has come my way again. The customer has asked for some changes that requires me to add a daughter board containing a bunch of power resistors - 2 rows of them. The absolute maximum voltage between any 2 nodes is 1KV - both DC and pulsating DC. Working voltage is about 875Vdc. There will be sinusoidal AC present between some nodes but the peak voltage will not exceed 1KV and is actually about 875V peak. There is very little chance of transients that exceed 1KV and I'm not going to concern myself with that possibility right now. I'm trying to keep this daughter board as narrow as possible so as to not block viewing of status LEDs that are on the main board. That means that the rows of resistors are going to be close together. I've got 2 layouts going right now - one has generous clearances between the resistor mounting pads but blocks the LEDs somewhat. The other is a little narrower - the LEDs are easily visible . However, the resistor pads are now very close together. At this point, it looks as if I have 0.100" of space between the pads. The PCB material is standard FR4 and we will be coating both sides of the PCB with Dow 2577 conformal coat. This is a thick, somewhat resilient material that has great long-term reliability and is yet fairly easily removable for service. I'm trying to figure out if I'm going to have a reliability problem with those resistor pads so close together. Can anyone point me towards a resource that might guide me? I am aware of the 40V per mil guideline (UL796, UL60950) for covered conductors on a PCB which suggests that I don't have a reliability problem. However, I'm not comfortable with that close spacing and am asking for outside opinions. Many thanks! dwayne -- Dwayne Reid Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax www.trinity-electronics.com Custom Electronics Design and Manufacturing -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist