PicDude wrote:
> Let me clarify a few things, which I think will make a difference -- the
> bits start and end with a L-->H transition. The H-->L transition point
> between the start and end points of each bit varies, so the duty-cycle
> determines the bit value. This is not NRZ. Yes, bits are the same length.

In that case, you have a self-clocking code, which makes things a LOT
easier.

You just need to poll the data line with a period that is less than (with a
comfortable margin) the minimum interval between any pair of transitions.
For example, if the signal is 1/3 high, 2/3 low for a 0 and vice versa for
a 1, then sample at 4x the bit rate, or 100 us. The timing margin you
select should include any expected peak-to-peak jitter in the sampling that
might be due to interrupt latencies, etc.

To decode the data, simply look for groups samples consisting of contiguous
1s followed by contiguous 0s, and make your bit decision based on the
relative counts in each group. This can even be done in the ISR itself,
with little overhead.

-- Dave Tweed
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