>If the consumer task is the only task that writes to the tail
>index (your IndexOut) and the producer task is the only task
>that writes to the head index (your IndexIn) *** AND *** you
>don't modify other counts (like your BytesInBuf and BytesFree)
>then a FIFO can be used efficently and safely to comunicate
>between and interrupt handler and some other task without the
>need to disable interrupts *** EVER *** while updating the FIFO
>(provided of cource that the head and tail indecies use the
>native word width of the CPU - this would be 8 bits for a 16F
>and 16 bits for a 24F).

This, of course assumes that each routine is modifying only the head or tail 
pointer as appropriate, and not updating a full/empty state variable as 
well, just recalculating it every time. The routines I posted the link to 
have a head pointer and count. 

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