On Thu, 30 Jul 2009, Harold Hallikainen wrote: > > >> My current projects, though, are using the state machine and FIFO > >> techniques on PIC24H chips. > > > > > > I am currently going through the same loop with 24FJ USB chips. > > > > The FIFO code I am using I found at > > http://www.cs.bu.edu/teaching/c/queue/array/types.html and modified so it > > wasn't using dynamic allocation. > > > > Here's my current FIFO code. Many FIFO implementations try to calculate > how much is in a FIFO or how much space is left by comparing the input and > output pointers. This is complicated with wrap-around. So, I just count > stuff as it goes in and out. Use of indices makes it easy to detect > wrap-around. Since the FIFOs are used in both main and interrupt code, I > generally disable interrupts when putting something in a fifo or pulling > something out. It gets messy when an interrupt changes stuff in the middle > of these operations. > If the consumer task is the only task that writes to the tail index (your IndexOut) and the producer task is the only task that writes to the head index (your IndexIn) *** AND *** you don't modify other counts (like your BytesInBuf and BytesFree) then a FIFO can be used efficently and safely to comunicate between and interrupt handler and some other task without the need to disable interrupts *** EVER *** while updating the FIFO (provided of cource that the head and tail indecies use the native word width of the CPU - this would be 8 bits for a 16F and 16 bits for a 24F). Friendly Regards Sergio Masci -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist