> Recovering the clock back might be a little more "interesting"... My
> first idea was to use a PLL but I suspect that it either won't lock in
> fast enough, or will lock in and then lose lock once the data starts
> streaming in.

I haven't looked at the links you provided, but I would be tempted to lock 
the VCO to the line rate, and then when it needs to lock to the data it 
"just" needs trimming slightly ... as you point out, the data rate is an 
integer multiple of the line rate, so a small phase error should lock in 
quickly.

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