At 06:35 PM 7/17/2009, James Newton wrote: >http://www.piclist.com/piclist/2009/07/17/183137a.txt? > >Could this have been related to the Read - Modify - Write issue? I mean, >could it be that the pin was just changed and it didn't have time to come up >to the expected logic level when running at full speed, but single stepping >introduced a (human) delay that permitted a slightly higher voltage to be >reached and therefore seen differently? Good thought and something that I explored quite thoroughly by adding in delays before the branch was taken, First a 4us delay, then a 30us delay, then a 30ms delay (just in case there was an external RC delay occurring - even though the scope showed a nice 100 - 200ns rise time). None of those helped, which is why I spent so much time exploring other parts of the program. After all, if it works properly when single stepping, it must be working - right? So the problem HAD to be somewhere else. Something else I'm noticing right now that I have to explore more carefully - it almost appears as if those Port C inputs aren't behaving as Schmitt Triggers. I have a little bit of ripple on the signal that feeds some of those Port C pins and I see that the inputs is behaving as if a logic LO is being seen when the input drops a little (10mV? 20mV?) below the logic HI threshold. I'll have to explore this much more carefully, though, before I say for sure that its happening. That's the behavior I expect to see when I'm using ports with TTL inputs - I avoid the problem by ensuring that the minimum input voltage for a logic HI is well above that threshold. Thanks for the thought! dwayne -- Dwayne Reid Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax www.trinity-electronics.com Custom Electronics Design and Manufacturing -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist