Heinz Czychun wrote: > I disagree here they, the IFs, are very significant because you > won't get out of the isr without clearing them. Wrong. The IF bits have nothing to do with interrupts if the corresponding IE bits are not set. Read the interrupt section of the datasheet again. All of it. Carefully. > I see it as a dyke or dam. All is ok as long as all the water is > kept out, no interrupts are allowed to happen. But once that first > crack happens, an interrupt occurs, all the set IFs are suddenly seen > by the cpu and need to be cleared before it can get back to the main > code again. I have no idea where you got that from, but again, it's just plain wrong. > I think that's why uChip has added an on bit to most (all?) > peripherals, so they never can set their IFs when off, so don't need > to be dealt with in the isr. No, it's to save power when they are not in use. Setting the IF bit causes no harm if the IE bit is not set and no code is specifically looking at the IF bit. ******************************************************************** Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products (978) 742-9014. Gold level PIC consultants since 2000. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist