Hi Heinz, my knowledge here is limited to beginner hobbyist so treat my comments accordingly. My experience has been I can disable tmr0 and use timer1. I am curious why you clear the int flag if you dont want to use it. ; Setup for TMR0 and enable interrupts ; ; clrf TMR0 ; start timer known state ; bcf INTCON,T0IF ; clear TMR0 interrupt flag ; Cheers Justin 2009/7/11 Heinz Czychun > Hi, > I'm having a little problem with controlling Timer 0 and Timer 1 > interrupts separately, on a PIC12F675. > > With Timer 1 disabled I'm able to control Timer 0 effectively with the > INTCON,T0IE bit. Off and on. But when I enable Timer 1, Timer 0 also starts > up and starts interrupting the processor. > > Is this normal? Is it a known problem? Or am I missing something? > > While it's not a big deal, it can be handled in the isr. But it's a > headache to trouble shoot and quite disconcerting when you expect only one > timer to be in operation, and another that should be off, is generating > interrupts. I'd like TMR1 to be on, and not have TMR0 interrupting thr > processor > > These are my settings > > ; initialize interrupts > banksel INTCON ; Bank 0 > movlw b'10100000' > ; 1------- (GIE)1=interrupts enabled > ; -0------ (PEIE)1=enable peripheral interrupts > ; --1----- (T0IE)0=disable TMR0 overflow interrupt > <- controls TMR0 effectively > ; ---0---- (INTE)0=disable GP2/INT external interrupt > ; ----0--- (GPIE)0=disable GPIO port change interrupt > ; -----0-- (T0IF)0=no on TMR0 overflow > ; ------0- (INTF)0=no GP2/INT external interrupt > ; -------0 (GPIF)0=no GPIO port change > movwf INTCON > > but when > > ; enable peripheral interrupts > banksel PIE1 ; Bank 1 > movlw b'00000001' > ; 0------- 0=disable EE write complete interrupt > ; -0------ 0=disable A/D converter interrupt > ; --xx---- not implemented > ; ----0--- 0=comparator interrupt disabled > ; -----xx- not implemented > ; -------1 (TMR1IE)1=enable TMR1 overflow interrupt > ; strangely this seems to also turns on > timer 0 > movwf PIE1 > > ; initialize TMR1 > banksel T1CON ; Bank 0 > movlw b'00000101' > ; x------- not implemented > ; -0------ 0=gate disabled > ; --00---- 11=1:8 prescaler, > ; 10 = 1:4,01 = 1:2,00 = 1:1 > ; ----0--- (T1OSCEN)0=LP oscillator is off > ; -----1-- (T1SYNC) 1=external clock input not > synchronized > ; ------0- (TMR1CS) 0=internal clock > ; -------1 (TMR1ON) 1=timer1 enabled > movwf T1CON > > ; initialize interrupts > banksel INTCON ; Bank 0 > movlw b'01000000' > ; 0------- (GIE)1=interrupts enabled > ; -1------ (PEIE)1=enable peripheral interrupts > ; --0----- (T0IE)0=disable TMR0 overflow interrupt > <-- TMR0 runs irespective of this > ; ---0---- (INTE)0=disable GP2/INT external interrupt > bit setting > ; ----0--- (GPIE)0=disable GPIO port change interrupt > ; -----0-- (T0IF)0=no on TMR0 overflow > ; ------0- (INTF)0=no GP2/INT external interrupt > ; -------0 (GPIF)0=no GPIO port change > movwf INTCON > > ; > ; Clear TMR0, its Flag and enable interrupts > ; > clrf TMR0 ; start timer known state > ; > bcf INTCON,T0IF ; clear TMR0 interrupt flag > bsf INTCON,GIE ; enable global interrupts > > complete code attached. > > T0IE becomes effective again if any of the TMR1 control bits are cleared > to stopping TMR1. > > I have some PIC12F683s coming so I can see if I have the same trouble > with them. > > Thanks, > Heinz Czychun > > > > > > > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist > > -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist