Michael Rigby-Jones escreveu:
>   =

>> -----Original Message-----
>> From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] On
>>     =

> Behalf
>   =

>> Of Isaac Marino Bavaresco
>> Sent: 23 May 2009 01:03
>> To: Microcontroller discussion list - Public.
>> Subject: Re: [EE] RTOS like this?
>>
>>
>> This is my proof of concept for a preemptive scheduler for PIC16 MCUs.
>> Not quite working, but shows the concept (in MPLB-SIM).
>>
>> Sometimes one task gets "lost",  but the others keep taking rounds. I
>> think I will need to rewrite the scheduler (interrupt routine) in
>> assembly for it to work correctly.
>>
>> The context is not saved/restored correctly yet (STATUS, FSR, etc.),
>> only the PC.
>>     =

>
> Sorry to be a bit negative, but this only works as well as it does
> because your tasks are so simple.  You are saving the return address at
> just one point in your task, yet the scheduler could interrupt it
> anywhere.  Even if you added context saving this would never work
> correctly with tasks that compiler to more than a couple of
> instructions.
>
> Regards
>
> Mike
>   =


If you analyze the macro Sw, you will see that the tasks may be
interrupted only at specific points, just after the return address is saved.
The tick interrupt stay disabled most of the time (the INTCON PIE bit =3D
register 0x0b, bit 6), and is only enabled for one instruction cycle
each time the macro is invoked (bsf 0x0b,6/bcf 0x0b,6).

Some people discussed here if it is preemptive or not (theoretically,
before I wrote the code). I think it is something in-between preemptive
and collaborative.
Preemption may happen just at specific points (when the macro is
called), but only if the tick has elapsed, unlike a "Yield" that forces
a switch every time it is called.

The idea is that the compiler add the code automatically every few
normal program instructions.

This is just a theoretical idea, I don't think it may be useful because
of its low efficiency.

Regards,

Isaac

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