> Keep in mind this PIC has lot of bad history and most people
> deliberately avoid it

So far this is the only problem. Which is annoying enough, no doubt,
but otherwise the 1320 seems to work OK

> Then using a separate Vref is a further small subset

If it proves to be the case that I'm right, I'm left wondering what
tests Microchip actually do on new silicon. Some bugs are picked
up (by whom ?) and put in errata sheets, yet other confirmed bugs
aren't. I know you've mentioned this previously

My discussions with Microchip Support are ongoing. We've covered
all the obvious. Pin setting, voltage measurements etc. I've re-read
the datasheet for any "Don't do this if ...." type of thing but nothing
jumps out. Hopefully it will be passed to an engineer to have a look
at on a real chip

Or if anyone here feels keen enough to try and make Vref+ work
on a 1320 they might have lying around ...... If I'm wrong, that's fine.
Embarrassing perhaps, but I'll get over it

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