Hi Jinx I have a question... can you confirm your intentions for the ADCON2 reg specifically the clock source? On Wed, Mar 11, 2009 at 6:06 PM, Jinx wrote: > > Are really really really sure VCFG1:0 is 0x01 instead of 0x00 ... ??? > > Using an external RAM capture, after initialisation and a few conversions - > > ADCON0 = 0x41 = b'01000001' => VCFG = 01 and ADON = 1 > ADCON1 = 0x76 = b'01110110' => AN3 and AN0 as analogue > ADCON2 = 0xBB = b'10111011' => right-justified, ACQ and clock > it seems from my limited understanding of the d/s you have set the Tad as 011 this is supposed to source the AD clock from INTRC, ok as long as the device frequency is not above 1MHz, but a note at 17.4 and table 17.1 of 39605F suggest this is only correct while using sleep. regards -- ...AB -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist