>> Are there any PICs that can output more than two duty cycles? Here's a more general question. I've noticed that the Atmel AVRs tend to have two "compare" registers for each timer, so that you can get two PWMs from one timer. The PICs tend to have the single compare per timer, so you only get one PWM per timer. What are the advantages and disadvantages of having multiple PWM outputs tied to a single timer, vs having lots of timers? My original thought was that additional timers meant additional silicon area, but on reflection it's not clear that the "compare" logic isn't as complicated as the counter... BillW -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist