Wouter van Ooijen escreveu:
> If I understand the PIC UART correctly, the TXSTA_TRMT flag indicates =

> that the shift register is empty. So if I find this condition, I think I =

> should be able to write *two* bytes to the TXREG. The first immediately =

> transfers to the TSR (shift register), the second waits until the first =

> is shifted out. Can anyone confirm tfrom actual experience that this work=
s?
>   =


Yes, it is exactly this way.

If you have TXIE enabled and in each call of the ISR you send just one
byte, you will get two consecutive interrupts (the PIC will return from
the first interrupt call, execute one instruction and call the interrupt
again).

Please note that you cannot clear TXIF by software. The only way to
avoid the interrupt from being called is to keep TXREG and TSR full,
disable GIE or disable TXIE.

If you are using interrupts, you must disable TXIE inside the ISR when
you put the last data byte of a sequence and re-enable it when you want
to start a new transmission sequence.

Best regards,

Isaac
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