>
> 24F series is limited to 16MIPs.  That's really really hard to read
> 1.3MB/sec off the parallel port and move it out another parallel port.
> The 24F series doesn't have any hardware support for the parallel port
> which causes a speed problem.  That is really problematic when you have
> to capture based on an external clock.  If your part sources the
> parallel clock, great, you can time it without a loop or interrupt to
> check the clock pin status.  Otherwise... you've only got *10*
> instructions per byte.  It's just not enough.
>

I seem to remember the TI MSP430s having a pretty flexible and potentially
very useful DMA architecture - you can link arbitrary I/O ports to memory
locations or other peripherals.

But quite frankly this sounds like a project for a CPLD or FPGA.
- Marcel
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