Harold Hallikainen wrote: >I wonder if this issue is the host computer recovering from a break > condition if the pin was low before the uart initialized. I think the > delay is a good solution. Another possible solution (though it adds > hardware, which I like to avoid) would be to add a pull-up resistor to the > PIC pin. Also set the pin high by writing the latch (if 18f, 24, or > higher) or port (if 16f) before clearing the tris bit so the pin does not > pulse low from the time you clear tris until you initialize the uart. As > to why the problem occurred with optimization, I'd guess that the startup > took less time, so the host had less time to recover from the break before > you started sending data. It's certainly worth exploring, but I doubt it. The message seems plenty long for the host to recover from the "break" condition. I will scope it out one of these days, I have a feeling the baud rate register is to blame. Vitaliy -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist