On Mon, Nov 10, 2008 at 1:01 PM, Forrest W Christian <forrestc@imach.com> w=
rote:
>
> FMAX =3D (16.36 MHz/V) (VDDAPPMIN =96 2.0V) + 4 MHz
>
> Doing this backwards....
>
> 25-4=3D 21
> 21/16.36 =3D 1.28
>
> 1.28+2.0V =3D 3.28, which means that 3.3V is in spec... I actually cranked
> the voltage up a bit as well, and still the same thing.

So it is kind of marginal. Could you try 5V operation and see if that
it is working or not?

And I see a huge list of errata about EUSART in the errata document
for the A3 silicon. Maybe you want to check them again. Just in case.


Xiaofan

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