> Ruben J=F6nsson wrote:
> >>>> MOVF PORTB,W
> >>>> MOVWF SHADOWB
> >>>> MOVLW B'100'
> >>>> IORWF SHADOWB,W
> >>>> MOVWF PORTB
> =

> > =

> > Yes, there still could be problems if the interrupt is just after IORWF =

> > SHADOWB,W. Then changes done in the interrupt routine will be undone wh=
en
> the =

> > non interrupt code does MOVWF PORTB. The key is, appart from using a sh=
adow
> > register, is to never read back from the port to the shadow register.
> =

> Hmmm you are right. But I don't understand your solution?
> =

>     BSF shadow, 0
>     MOVFW shadow
>     =3D=3D=3D> interrupt here
>     MOWF port
> =

> This sequence does not read the port, but changes made by the interrupt =

> would still be lost.
> =

> -- =


Yes, you are right. I only thought about manipulating the shadow register =

itself. Not actually copying it out to the port. The copying will require t=
hat =

interrupts are disabled if the copying can be done from both non isr and is=
r =

code.

It will work if you don't need to copy, that is if you don't need a shadow =

register. But then you have to be aware of the rmw issue. Unless you have a =

latch register in the hardware, that is.

However, the initial point was that even with a latch register (or shadow =

register) you have to be aware of interrupts if some bits in the register c=
an =

be manipulated by the isr code while other bits are manipulated by non isr =
code =

at the same time.

/Ruben =


=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D
Ruben J=F6nsson
AB Liros Electronic
Box 9124, 200 39 Malm=F6, Sweden
TEL INT +46 40142078
FAX INT +46 40947388
ruben@pp.sbbs.se
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D
-- =

http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist