On Oct 24, 2008, at 3:29 AM, Wouter van Ooijen wrote: > I certainly don't know any other CPU architecture that has indexed > access to its registers! DEC PDP-10; the registers were also addressable as the first 16 memory locations. You could even put code in the registers and jump to them, for a speed boost. The "register vs ram" thing on PIC got particularly interesting when comparing low-end PICs vs low-end AVRs, since the AVRs had 32 registers and 0 "ram", while the PIC had W and "less than 32" "general purpose registers." For that matter, the AVR registers also share an indexed address space with RAM. The "indexed" space has "general purpose" registers from 0 to 31, "IO registers" from 32 to 95, and "Ram" from 96 upward (at90s2313; exact values might differ.) BillW -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist