Apptech wrote:
> Surely that's cutting the garment to suit the cloth.
> If someone wants to do individual byte writes then being forced to do
> page writes to suit a hardware shortcoming *may* justify the use of a
> different technology.

Right, but so far there has been no evidence of that.  He has never
mentioned page mode writes.  I think it's a pretty good conclusion that he
either hasn't bothered to read the manual and didn't realize this was
available, or he is scared of it for being "too complicate".

What I have sometimes done is write a low level EEPROM routine that buffers
a whole page in RAM.  The accesses to this routine can be random, and it
only does a write if the next address is not on the same page as the
current.  Most of the time writes are sequential, but this insulates the
upper levels from the low level detail of the page size and alignment, and
is generally efficient.


********************************************************************
Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products
(978) 742-9014.  Gold level PIC consultants since 2000.
-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist