2008/9/7 WH Tan: > I heard of PIC16F1000, which is a newly announced > architecture. And from what I heard: This new architecture has some enhanced features over the PIC16 architecture, namely 1) Increase the maximum program memory: can address up to 32K (vs 8K of PIC16) 2) Increase the maximum data memory 3) Increase of hardware stack level to 16. 4) Reduce the penalty for paging/banking - by introducing new BSR register. Hence the old PR0/PR1 is no more exist. - by introducing new MOVLP instruction. 5) Automatic ISR context saving for W, STATUS, BSR, FSR0, FSR1, PCLATH. 6) Has 2 indirect RAM accesses through INDF0 and INDF1. Support pre/post increment/decrement. 7) Relative branch (signed and unsigned offset). 8) Stack over/underflow cause Reset. 9) Stack can be accessed via SPTR and TOS. 10) RESET instruction. 11) Some advanced arithmetic instruction - some already exist in PIC18, some are NOT. 12) Enhanced program memory read. Device ID, user ID and configuration word are now readable by the firmware. and many more I believe. Best regards, -- WH Tan -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist