In SX Microcontrollers, SX/B Compiler and SX-Key Tool, Woodys62 wrote:

<SPAN style="FONT-SIZE: 10pt; FONT-FAMILY: Arial">I am experiencing an internal oscillator freq cal problem with a batch of <SPAN style="mso-spacerun: yes"> SX-28AC/SS chips. I am using SX-Key v. 3.2.3 and my assembly device statement is:<?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" /><o:p></o:p>

<SPAN style="FONT-SIZE: 10pt; FONT-FAMILY: Arial"><SPAN style="mso-tab-count: 1">            DEVICE<SPAN style="mso-tab-count: 1">            SX28L,STACKX,OSC4MHZ,BOR26,WATCHDOG,PROTECT<o:p></o:p>

<SPAN style="FONT-SIZE: 10pt; FONT-FAMILY: Arial"><SPAN style="mso-tab-count: 1">            FREQ<SPAN style="mso-tab-count: 1">   <SPAN style="mso-tab-count: 1">            4_000_000<o:p></o:p>

<SPAN style="FONT-SIZE: 10pt; FONT-FAMILY: Arial"><SPAN style="mso-tab-count: 1">            IRC_CAL<SPAN style="mso-tab-count: 1">           IRC_4MHZ<o:p></o:p>

<SPAN style="FONT-SIZE: 10pt; FONT-FAMILY: Arial">The problem chips all have date code 0636. This batch of chips seems to favor a low frequency tendency. Some of these chips are programming to as much as 15% low when using the IRC_4MHZ directive. I have noticed illogical clock freq variations when reprogramming chips and substituting IRC_FAST or IRC_SLOW into the IRC_CAL statement above. Some chips will exhibit a faster clock freq when programmed with the IRC_SLOW directive and a slower clock freq when programmed with IRC_FAST. This seems to be opposite to the intended result. Can someone explain the programming process that occurs when the IRC_CAL<SPAN style="mso-spacerun: yes">  directive is serviced by the SX-KEY programmer? What is the actual cal freq determining process when the IRC_4MHZ directive is used?<o:p></o:p>

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