I didn't notice the original was untagged, sorry:

Well, it is tricky, but you might be able to do one of the following:

1)
Track the master clock carefully (maybe use a CCP pin?) to get your
timing right, and don't wait for the BF to be set - prepare and then
shove the data into the SSBUF according to a timer you have setup
that's as close to the master clock as possible.  You can probably
safely load it during the last half of the last transmitted bit,
rather than waiting for it to complete before loading.

2)
If you use a PIC with two SPI peripherals (there are 47 18F pics with
two MSSP channels) then you could use external logic to switch between
the two in a sort of double buffering arrangement.  Load the data in
one and while it's feeding the master load the next chunk in the
other.  Switch the clock and data lines to the other (maybe be able to
merely switch the clock line), and reload the first.

3)
Beyond that - you may want to look at using programmable logic chips
(FPGA/CPLD/etc).  This should be able to fit into the
simplest/cheapest of them...

-Adam



On 8/6/08, Alan B. Pearce <A.B.Pearce@rl.ac.uk> wrote:
> >Did you see Adams reply to your untagged post?  He's described
> >a cunning method that might work around the problem.
>
> Ah, a cunning method (with apologies to Baldric)
>
> Could someone please tag it and resend it?
>
>
> --
> http://www.piclist.com PIC/SX FAQ & list archive
> View/change your membership options at
> http://mailman.mit.edu/mailman/listinfo/piclist
>


-- 
EARTH DAY 2008
Tuesday April 22
Save Money * Save Oil * Save Lives * Save the Planet
http://www.driveslowly.org
-- 
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist